The present invention relates to an oscillation circuit, and more particularly, to an oscillation circuit for reducing power dissipation not only to a piezo-electric crystal but also to the entire oscillation circuit without the circuit being a particular operating frequency.
In an amplifier for generating a signal, for example, a clock signal of a semiconductor circuit, a maximum level of power dissipation of a piezoelectric crystal is established so as to not damage the crystal. When the crystal oscillation reaches the maximum level permitted, means are provided for limiting the driving signal applied so as to not damage crystal.
As shown in conventional art FIG. 1, an oscillation amplifier A10 made of a CMOS inverter receives an oscillation signal from piezo-electric crystal XT, inverts, and amplifies the received signal to a predetermined amplification degree. Series amplifiers A13 and A14 (each a CMOS inverter) apply the output of amplifier A14 to an output terminal of the oscillation circuit when a predetermined magnitude of oscillation wave form is output from oscillation amplifier A10. Crystal oscillator 100 has a resistance lower than 10 ohms, with the Q-factor being above 20,000.
The operation of the conventional oscillation circuit constructed as above will be described below.
In the conventional oscillation circuit 100, oscillation amplifier A10 amplifies the oscillation signal applied from piezo-electric crystal XT to a predetermined amplification degree and inverts the amplified signal. Oscillation detecting amplifiers A11 and A12 detect the magnitudes of oscillation signal at input node N00 and output node N10 of oscillation amplifier A10, respectively. Oscillation detecting amplifier A12 detects the negative amplitude of the oscillation signal, with oscillation detecting amplifier A11 detecting the positive amplitude of the oscillation signal. According to the detection result, if piezo-electric crystal XT oscillates above a predetermined level, MOS transistors M11 and M12 for limiting power are turned on by the output signals of oscillation detecting amplifies A11 and A12.
When the power provided by oscillation amplifier A10 equals the power consumed by the circuit, equilibrium is attained.
Since the power applied to piezo-electric crystal XT is limited as the MOS transistors M11 and M12 are turned on, power is applied to piezo-electric crystal XT so as to allow piezo-electric crystal XT to oscillate with a maximum power dissipation. The output wave form of the piezo-electric crystal XT is amplified through amplifiers A12 and A13, each made of a CMOS inverter, and applied to an output of the circuit.
The conventional oscillation circuit is advantageous in limiting the power applied to the piezo-electric crystal. However, the conventional oscillation circuit limits only the power applied to the piezo-electric crystal, with the power applied to the entire circuit being fixed. Thus, the power dissipation of the entire circuit is not reduced.
The limiting circuit for limiting the power applied to the crystal oscillator is made of N-type MOS transistors which are driven according to the oscillation wave form which oscillates positive and negative and is output from the oscillation detecting amplifier. Since the MOS transistors, which are power limiters, are not driven continuously, the power applied to the crystal oscillator is intermittently limited.